EC262 Syllabus

EC262 FALL 2013 SYLLABUS

Text: Digital Design With An Introduction to the Verilog HDL, Mano and Ciletti, Fifth Edition

EC262 Digital Systems

Day

Topic

Read (section)

Homework/Design Files

1. Week of 19 August Monday 19 August 2013 - first day of class
M Introduction (Notes 01)    
T Number Systems 1.1-1.5 Problem Set 1  (Solution)
W Binary Logic (Notes 02) 1.7-1.8  
F Binary Logic   Problem Set 2  (Solution)
2. Week of 26 August  
M Binary Arithmetic and Binary Codes (Notes 03) 1.6 Quiz 1 (Solution)
T Lab 1: Binary Logic Lab 1 Lab Notebook
W Binary Arithmetic and Binary Codes   Problem Set 3  (Solution)
F Boolean  Algebra (Notes 04) 2.1-2.5 Problem  Set 4 (Solution)
3. Week of 2 September Monday 2 September 2013 - Labor Day Holiday - No Classes
Tuesday 3 September 2013 - Monday Schedule
M No Classes    
T Boolean  Algebra 2.6  
W K-Maps (Notes 05) 3.1-3.2 Quiz 2    (Solution)               
Problem Set 5 (Solution)
F K-Maps 3.3-3.4  
4. Week of 9 September  
M Quartus II Tutorial    
T Lab 2: Introduction to Quartus II Lab 2

Quartus II Introduction
Quartus II Software

QSim Simulator
W K-Maps 3.5, 3.8 Problem Set 6 (Solution)
F Design of Combinational Circuits  (Notes 06) 4.1-4.4 Problem Set 7 (Solution)
5. Week of 16 September  
M Iterative Circuits  (Notes 07) 4.5, 4.8 Quiz 3    (Solution)   
Problem Set 8 (Solution)
T Lab 3: 4-bit Adder Lab 3  
W Decoder, Encoder, Mux, Demux (Note 08) 4.9-4.11 Problem Set 9 (Solution)
F Design of Combinational Circuits     Exam 1 Study Guide
Exam 1 (fall 2011)      Answers
Exam 1 (fall 2012)      Answers
6. Week of 23 September Tuesday 24 September 2013 - Exam #1
M Review    
T Exam #1    
W VHDL: Code Structure (Note 09)
(Note 09 w/ sol)
   
F VHDL: Data Types Problem Set 10 (Solution: adder.vhd)
7. Week of 30 September  
M VHDL: Data Types    
T Lab 4: Seven Segment Display Lab4

Quartus II Supplementary Notes
adder.vhd
W VHDL: Concurrent Code (Notes 10 w/ sol)   Problem Set 11 (Solution)
F VHDL: Concurrent Code    
8. Week of 7 October  
M VHDL: Concurrent Code    
T Lab 4:    
W Latches   (Notes 11) 5.1-5.3
F Flip Flops 5.4  
9. Week of 14 October Monday 14 October 2013 - Columbus Day Holiday - No Classes
M  No Classes    
T Lab 5: Robot    
W Analysis of Clocked Sequential Circuits 5.5  
F Design of Sequential Circuits 5.7-5.8  
10. Week of 21 October  
M Registers 6.1-6.2
T Lab 7:    
W Counters 6.3-6.4  
F Design of Sequential Circuits (ASM, One Hot Encoding) 8.1-8.5
11. Week of 28 October Tuesday 29 October 2013 - Exam #2
M Review    
T Exam #2
W VHDL: Sequential Logic    
F VHDL: Sequential Logic    
12. Week of 4 November  
M VHDL: Sequential Logic    
T Lab 8:    
W VHDL: Sequential Logic    
F VHDL: Sequential Logic  
13. Week of 11 November 11 November 2013 - Veterans Day Holiday - No Classes
M No Classes    
T Lab 9: Obstacle Avoidance Robot    
W Lab 9: Obstacle Avoidance Robot    
F Lab 9: Obstacle Avoidance Robot    
14. Week of 18 November

M Design Project    
T Design Project    
W Design Project    
F Design Project    
15. Week of 25 November Wednesday 27 November 2013 - Early schedule of classes
Thursday-Friday 28-29 November 2013 - Thanksgiving - No Classes
M Design Project    
T Design Project    
W Design Project    
F No Classes   Final Project Report Guidance
16. Week of 2 December Thursday 5 December 2013 – last day of class 
Friday 6 December 2013 -- review day
Exam Week 1 starts on Saturday 7 December
M Design Project: Demonstration    
T Design Project: Presentation    
W Course wrap-up    
F Review Day    
17. Week of 9 December Final Exam Week 2
M      
T      
W      
Tr      
F      
18. Week of 16 December Final Exam Week 3
M    
T    
W    
Rev. 10/07/2013

 

horizontal bar
United States Naval Academy • Department of Electrical and Computer Engineering
eedept@usna.edu • 410-293-6150