EE242 Syllabus

EE242 FALL 2009 Syllabus

Text 1: Introduction to Logic Design, Marcovitz 2^ND Edition

Text 2: Circuit Design with VHDL, Pedroni

242 Digital Systems Rev. 11/18/2009
	Topic	Read	Homework
1. Week of 24 Aug		24 August 2009 - first day of class
	Introduction and Number Systems	1-19	Ch. 1 # 1 adfg, 2 aceg, 3 ii abcd
	Number Systems and Design Process	11-27
	Number Systems and Design Process	11-27	Ch. 1 # 5, 6 abef, 10 cde, 16 fg
Lab	Lab 1 - Introduction and equipment set-up Lab Notebook
2. Week of 31 Aug
	Switching Algebra	46-55	Ch. 2 # 3, 6 bdh
	Boolean Algebra - SOP	56-64	Ch. 2 # 8, 9 (function f only), 11, 12 abc
	Karnaugh Maps	65-72	Ch. 2 # 13 abd, 20 j(Kmap only)
Lab	Lab 2 - Logic Implementation
3. Week of 07 Sept		7 September 2009 - Labor Day Holiday - No Class Meeting 8 September 2009 - Monday Schedule
	Boolean Algebra - POS	73-81	Ch. 2 # 16, #17 ad, 18 ab
	Boolean Algebra - Manipulation	82-99	Ch. 2 # 20 a, 21 a, 25 b
	Logic Optimization - Karnaugh Maps	129-145	Ch. 3 # 1 dhm, 2 a
Lab
4. Week of 14 Sept
	Introduction to Altera
	Logic Optimization - Karnaugh Maps	146-155	Ch. 3 # 4 e, 6 ce , 8 ce
	Logic Optimization - Karnaugh Maps	156-173	Ch. 3 # 11 b (6 Gates, 11 Inputs) 12 a (6 Gates, 10 Inputs)
Lab	Lab 3 - Altera Design
5. Week of 21 Sept
	Combinational Logic	262-269	Ch. 5 # 1, 3
	Decoders, Encoders, and Multiplexers	270-280	Ch. 5 # 9, 12, 13
	Example Problems	100-118	Solved Problems Ch. 2 {6abcd,7,10,12a,13a,18d,20a,22a}
Lab	Lab 4 - Full Adder
6. Week of 28 Sept		Exam #1 29 September 2009 (Tuesday)
	Review for Exam #1		Solved Problems Ch.5 # 2,5,6,7,11 Ch.3 # 3ab,5ab,7,10abe
	State Tables and Flip-Flops	365-375 JK FF
	Analysis of Sequential Circuits	376-386	Ch. 6 # 2 abc, 3 abc, 5 (replace diagram with table)
Lab	Exam #1 29 September 2009
7. Week of 05 Oct
	Sequential Circuit Example Problems	386-399	Ch. 6 # 4
	State Machine Design	414-439 443-457	Ch. 6 #7ab, # 8 ab Ch. 7 # 16 ae
	State Machine Design	414-439	Ch. 7 1 b (i, iv only), 2 a
Lab	Lab 5 - D, JK, and T FF
8. Week of 12 Oct		12 October 2009 - Columbus Day - No Class Meeting
	State Machine Design	414-439	Ch. #7 7
	Introduction to VHDL	Pedroni Ch 1 - 3	Pedroni Ch. #2 2.2 a
Lab	Lab 6 - Seven Segment Display
9. Week of 19 Oct
	Design with VHDL	Pedroni Ch 4-5	Pedroni Ch 5 # 6 (only one 4 bit solution necessary)
	Design with VHDL	Pedroni Ch 6	Pedroni Ch. 6 # 8 only one solution necessary
	State Machine examples with VHDL	Pedroni Ch 8	Pedroni Ch. 8 # 1
Lab	Lab 7 - Counters
10. Week of 26 Oct
	Asynchronous Counters	440-443	Ch. 7 # 12 Lab # 8 VHDL (due at lab)
	One-Hot Encoding and PLDs	498-507	Ch. 7. #2 a i but using one-hot method Ch. 8 # 12 d only (do not worry about output from c)
	Shift Registers	485-490
Lab	Lab 8 - State Machine
11. Week of 2 Nov		Exam #2 03 November 2009 (Tuesday)
	Review for Exam #2		Solved Problems Ch. 6 1,2ac,3,4,5,6 Ch. 7 all Ch. 8 1,2,3,5
	Shift Registers and Counters	485-490, 491-498	Ch. 8 # 1
	Counters	491-498 (example 8.4 is incorrect)	Ch. 8 # 3a
Lab	Exam #2 03 November 2009 (Tuesday)
12. Week of 09 Nov		11 November 2009 - Veterans' Day Holiday - No Class Meeting
	State Machine examples	Exs.
	In-class state machine design project	Robot Robot II Datasheet
Lab	Lab 9 - Clock
13. Week of 16 Nov
	In-class state machine design project		Ch. 1 10 abf, Ch. 2 20 cg, Ch. 2 25 df
	In-class state machine design project
	In-class state machine design project		Ch. 3 6 bdj Ch. 5 5
Lab	In-class state machine design project
14. Week of 23 Nov		25 November 2009 - Early schedule of classes 26-27 November 2009 - Thanksgiving Holiday - No Class Meetings
	Altera: Design Project	Projects	Final Project Grading Lab Report Guidance Lab Report Grading
	Altera: Design Project		Ch. 6 4a, 6ab, Ch. 7 2b, 12 (but do base-5 counter) 16o
Lab	Altera: Design Project
15. Week of 30 Nov
	Altera: Design Project
	Altera: Design Project
	Altera: Design Project		Ch. 7 2b (one-hot only) Ch. 8 2
Lab	Altera: Design Project
16. Week of 07 Dec		11 December 2009 – last day of class
	PRESENTATIONS
	PRESENTATIONS
	PRESENTATIONS/ Course Wrapup/Final Exam Discussion
Lab	PRESENTATIONS
	FINAL ?? December 2009 :

242 Digital Systems Rev. 11/18/2009

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