SI232 Spring 2006

January 2006
SundayMondayTuesdayWednesdayThursdayFridaySaturday
1 2 3 4 5 6 7
8

Week 1 
 9

Class 1: Course Overview, Computer Anatomy (set 1).
Reading: Chapter 1 (1.7 optional)
10 11

Class 2: Instructions (set 2)
Reading: 2.1-2.5
12 13

Class 3: Instructions/Memory

Class 4: Machine Language
14
15

Week 2 
 16

MLK Day
 17 18

Class 5: Control Flow, pseudoinstructions (set 3)
Reading: 2.6

HW(Ch 1) due

 19 20

Class 6: Constants/looping
(set4)
(set5: spim)

Lab 1 (SPIM). Pre-lab due at start of class
 21
22

Week 3 
 23

Class 7: Stacks/procedures. Reading: 2.7-2.10
24 25

Class 8: Nested procedures

Lab 1 due
 26 27

Class 9: Addressing/ISAs
Reading: 2.13, 2.15-2.18 (skim 2.16)

Class 10: Digital Logic (set 6)
Reading: B.1, B.2, B.3. Skim B.5

QUIZ

SPIM Project announced
 28
29

Week 4 
 30

Class 11: Logic (set 7)
31        

February 2006
SundayMondayTuesdayWednesdayThursdayFridaySaturday
      1

Class 12: Logic, minimization (set 8)

HW(Ch 2) due
 2 3

Class 13: K-Maps

Class 14: Logic example, mux, decoders
4
5

Week 5 
 6

Class 15: PLAs, sequential logic
Reading: B.7-B.10, B.12 (skip Verilog details)
7 8

Class 16: Latches, flipflops, state machines

SPIM Project due
 9 10

Class 17: Finish memory.

Class 18: Computer Arithmetic (set 9)

AppB quiz
 11
12

Week 6 

X Week
 13

Class 19: Review
Feedback due
14 15

6 Week Exam
 16 17

Class 20: Number representation
Reading: 3.1-3.4. Skim 3.5

Lab 2 (LogicWorks)
 18
19

Week 7 
 20

Presidents Day
 21 22

Class 21: Computer Arithmetic.
(set 10)
23 24

Class 22: Floating point.
(set 11)
Reading: 3.6, 3.8

Class 23: MIPS FP instructions

Lab 2 due
 25
26

Week 8 
 27

Class 24: ALU, multiplication.

Paper topic due
 28        

March 2006
SundayMondayTuesdayWednesdayThursdayFridaySaturday
      1

Class 25: Performance. (set 12)
Reading: Chapter 4

HW(Ch3) due
 2 3

Class 26: Perf. Metrics

Class 27: Benchmarks
4
5

Week 9 
 6

Class 28: Processor intro
(set 13)
Reading: 5.1-5.4
7 8

Class 29: Single cycle datapath

HW(Ch4) due
(prob 4.22)
 9 10

ArchLab1

ArchLab2
 11
12

Spring Break
 13

Spring Break
 14

Spring Break
 15

Spring Break
 16

Spring Break
 17

Spring Break
 18
19

Week 10 
 20

Class 30: Single cycle control
(set 14)
21 22

Class 31: Single cycle control
23 24

Class 32: Multicycle datapath
(set 15)
Reading: 5.5, 5.10, 5.11. First two pages of 5.6

Class 33: Multicycle implementation
25
26

Week 11 
 27

Class 34: Multicycle control

LW Project due
(helpful example)
(old example)
 28 29

Class 35: Memory hierarchy
(set 16)
Reading: 7.1-7.3
30 31

Class 36: Caching: blocks, associativity

Class 37: Improved caching (set 17)

HW(Ch5)

Ch 5 quiz
  

April 2006
SundayMondayTuesdayWednesdayThursdayFridaySaturday
            1
2

Week 12 

X Week
 3

Class 38: Review
(feedback due Wed)
4 5

12 Week Exam
 6 7

Class 39: Improved caching
(set 18)

Class 40: Cache performance
8
9

Week 13 
 10

Class 41: Virtual memory intro
Reading: 7.4 (skip 531-536), 7.5, 7.7, 7.8
11 12

Class 42: VM finale, caching finale
13 14

Class 43: Ethics: Copyright & DMCA

Class 44: I/O intro
Reading: Chapter 8 (skip 8.8)
(set 19)

Ethics reading quiz
 15
16

Week 14 
 17

Class 45: I/O finish
18 19

Class 46: Pipeling intro
Reading: 6.1, 6.9-6.12
(set 20)

HW(Ch7) due
 20 21

Class 47: Pipelining

Class 48: Pipeline control, hazards
22
23

Week 15 
 24

Class 49: ILP and multiple issue
(set 21)

Course paper due
 25 26

Class 50: Improving multiple issue
27 28

Class 51: Multiprocessors and SMT
(set 22)

Class 52: Conclusion
(final exam review)
 29
30

Week 16 
            

May 2006
SundayMondayTuesdayWednesdayThursdayFridaySaturday
  1

Study Day

Final Exam (1330, MI200)
 2 3 4 5 6
7 8 9 10 11

Grades Due
 12 13
14 15 16 17 18 19 20
21 22 23 24 25 26 27
28 29 30 31